The ability to sense supply currents is useful in many electronic systems. Current sensing is used in such applications as over-current protection and monitoring of battery charge level, helping maintain desired power levels and to prevent circuit faults and over-discharged batteries. One method for determining current (referred to as magnetic sensing) is via measurement of the magnetic field around a current-carrying conductor, but such an approach is costly, not without sources of error, and is limited to AC current measurement. Another method of determining current (referred to as resistive sensing) is through placement of a small resistor in the current path, and measurement of the voltage drop across the resistor. Specifically, a small voltage drop across a “current-sense” resistor (“Rsense”), that is placed in series with the voltage source (e.g., battery), and the load, is measured. If Rsense 506 is connected in series with the “hot wire” (e.g., with the high-voltage power supply), this is referred to as high-side current sensing. Connecting Rsense 506 to ground would be referred to as low-side current sensing. The voltage drop can then be amplified to produce an output signal that is proportional to current. The value of Rsense 506 should be low to minimize power dissipation in the current sense resistor, but it should be high enough to produce a voltage drop that is detectable by the sensor amplifier.
Referring initially to FIG. 1, a prior art current-sensing circuit includes a zero-drift operational amplifier 102 and pairs of laser-trimmed resistors 104 for attenuating the input common-mode voltage to within the supply range of the amplifier 102. Common-mode noise in the power supply is not rejected if there is a difference in the resistance values of the resistors 104, and the resistors 104 must be precisely matched to balance inputs to the amplifier 102 for achieving a high CMRR. Laser trimming may be used to precisely match the resistors 104 to each other, and that increases the cost of the integrated circuit die (chip). Also, because imperfections in the resistors 104 are inevitable in real-world applications, the accuracy of the circuit is reduced despite the costly attempt at matching resistors 104 via laser trimming. Moreover, such a resistor network increases the size of the package, something that is undesirable when space is limited in small electronics. Furthermore, the resistor network increases the current draw (Idd) from the terminals of the amplifier 102 and thus tends to waste more power. Such a circuit is implemented in the Analog Devices, Inc., datasheet for the AD8207.
Referring to FIG. 2, a current sense monitor includes a zero-drift amplifier 202, a second amplifier 204, and a network of capacitors and resistors. As with the circuit shown in FIG. 1, these capacitors and resistors must be precisely matched to achieve high CMRR, something that increases costs. The switching of the capacitors, in combination with the RC time constants of the capacitors, increases settling time (i.e., the time required for voltages to settle), which reduces bandwidth for the circuit (i.e., how rapidly a change in load current could be sensed). The network of capacitors and resistors also increases package size. Such a circuit is implemented in the Texas Instruments Inc., datasheet for the INA282.
Referring to FIG. 3, depicted is a prior art current-feedback instrumentation amplifier for high-side current-sensing with auto-zeroing features. This high-side current sensing circuit includes an instrumentation amplifier with chopping and auto-zeroing circuitry for lowering drift and DC offset. However, this architecture has greater complexity, higher noise, slower speed and requires a relatively larger die and package size to accommodate the larger number of components. Such a circuit is discussed in an article by Witte, Huijsing, & Makinwa, “A Current-Feedback Instrumentation Amplifier with 5 μV Offset for Bidirectional High-Side Current-Sensing, IEEE Journal of Solid-State Circuits, Vol. 43, No. 12, December 2008.
Because voltages arrive at circuits from different sources and at different times, a level shifter is useful to translate or shift voltage levels and domains. Prior level shifters, such as the one shown in FIG. 4, suffer from several drawbacks. For example, they may have a high number of digital latches resulting in higher overshoot currents from high voltage power supplies. They may also have input and output clocks with the same frequency, and only be able to show the result for high-voltage power supplies of, e.g., 10 volts, with no result available for higher voltages. Such a circuit is shown by Moghe, Lehmann, & Piessens, “Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 μm HV-CMOS Technology,” IEEE Journal of Solid-State Circuits, Vol. 46, No. 2, February 2011.